Creating a Zynq or FPGA-Based, Image Processing Platform

Creating an image processing platform that enables HDMI input to HDMI output. This can be used as a base for HLS-based image processing demo.

This project will demonstrate how to create a simple image processing platform based on the Xilinx Zynq. This project will then be used as a base for later developments which focus upon High-Level Synthesis based development which allows the use of the industry standard OpenCV library.

To create this example I am using a Zybo Z7 as it provides both HDMI input and output, along with a CSI-2 interface for a MIPI camera which we can use also for future developments.

In addition to the Zybo-Z7 we will be using:

HDMI Camera e.g. the Apeman 1080P action camera
Associated cables for HDMI In and Out ports
HDMI Display
To create the application we will be using the following development tools & libraries:

Vivado 2017.4
Xilinx SDK 2017.4
Digilent Vivado Library
To create this example we need to perform the following preparatory steps:

Download and extract the Digilent Vivado Library to your computer
Install the Digilent Board definitions, if you are unsure how to do this click here
Create a new Vivado project targeting the Zybo-Z7
Create a new block diagram within Vivado
Inside the Vivado block diagram we need to add the following IP:

Zynq Processing System - This will provide the configuration and control of the image processing system, while its DDR is used also as a frame buffer ensure the following configuration

PL Clock 0 = 200 MHz
PL Clock 1 = 100 MHz
HP 0 Slave enabled - this will be used to transfer images to and from the PS DDR
GP 0 Master enabled - this is used to configure the image processing chain
DVI2RGB - This converts the HDMI video stream into a 24 bit RGB bus with appropriate vertical and horizontal syncs.”