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“Deploy an object detection model on DPU to build a system which can show detected commodities in VCU decoded video or images from camera. Introduction : Checkout So Easy is a smart retail system on ZCU104 with VCU and DPU. As …

“Social distance monitor using yolov3 and DPU acceleration on Ultra96v2 The world is now under the cloud of Covid-19 and it has been a hard time when the virus is spreading across the world. Since keeping distance and wearing a …

“This FPGA ROM emulator dramatically speeds software development time on computers with ROM-based storage. RapidROM This FPGA ROM emulator dramatically speeds software development time on computers with ROM-based storage. It will simulate any 28c256-compatible ROM chips. Typically, the …

“This project will go trough the process of acquiring an input signal through the Zmod ADC and re-creating the signal through the Zmod DAC. Introduction Oh, the world of digital processing has moved fast this decade! when it comes to …

“A tutorial on creating an UART interface between the Basys 3 board and the computer terminal in VHDL running on FPGA. Some time ago, I was looking for an UART design in VHDL that was easy to follow, and surprisingly …

“This project implements a UART transmit logic design in HLS. Like my previous projects, this one also demonstrates that “Designing digital systems with HLS for FPGA is fun”. If you are interested in learning HLS coding techniques please refer here …

“Digital clock (time) on 4 single 7 segment common anode display implemented hardware on Xilinx Spartan 6 FPGA. Digital clock (time watch) on 4 single 7 segment common anode display implemented hardware on Xilinx Spartan 6 FPGA. Use.ucf (implementation …

“This project is a FPGA based media player which is capable of playing Motion JPEG encoded video over HDMI or VGA on commonly available FPGA boards. Features 800x600 25fps video (higher resolutions may also be possible) 44.1KHz stereo audio …

“A real-time foveated camera / foveated vision system. This project’s goal is to implement FPGA/SoC design for real-time foveated camera and foveated FPGA-accelerated image processing pipeline implemented iTracker (MIT CSAIL), AlexNet-inspired CNN for foveation control by feed of …

“Communicating between FPGA up to 40 metres apart using IR modulation. Processing at the edge is a rapidly increasing application for embedded systems, often these edge nodes are connected using a RF link e.g. Zigbee, WiFi etc. However, there …