Content for FPGA

Smart High Level Synthesis (HLS) Tool Suite Enables C++ Based Algorithm Development Using Microchip’s PolarFire® FPGA Platform

“Enhances Accessibility to PolarFire FPGAs for Hardware Acceleration in Edge Compute Systems. The need to combine performance with low power consumption in edge compute applications has driven demand for Field Programmable Gate Arrays (FPGAs) to be used as power-efficient accelerators …

Pet on a Chip

“A few years back in high school I worked on building the robot described in the 1979 book “How to Build Your Own Working Robot Pet” by Frank DaCosta. The robot was controlled by an 8085 (an 8-bit microprocessor), and …

SonicSurface: Phased-array for Levitation, Mid-air Tactile Feedback and Target Directional Speakers

“We will build an array of ultrasonic emitters. It has 256 emitters arranged in a 16x16 grid operating at 40 kHz with individual phase control. It can focus the acoustic power at controllable positions to create dynamic levitation of small …

A Pixel Purse LED Cube Controlled by a Cisco 3G Modem

“I presented this project at BangBangCon West 2020, but never got around to publish a blog post about it. A 10 minute talk is not enough to cover some technical aspects, and since I’m starting to forget them, it …

The Graphics Gremlin - a Retro ISA Video Card

“The Graphics Gremlin is an FPGA-based ISA video card specifically designed to emulate certain old video standards. This initial release emulates the original IBM PC monochrome graphics adapter (MDA) as well as the original IBM color graphics adapter (CGA …

Tachyum Unveils Prodigy Universal Processor FPGA Emulation Prototype

“Tachyum™ Inc. today announced the upcoming availability of its Prodigy Universal Processor prototype, built using field-programmable gate array (FPGA) emulation boards. The hardware prototype is currently completing in-house testing before being made available to early adopters. Tachyum’s Prodigy emulation …

Forth computing system

“A Forth CPU and System on a Chip, based on the J1, written in VHDL This project implements a small stack computer tailored to executing Forth based on the J1 CPU. The processor has been rewritten in VHDL from Verilog …

Checkout So Easy - Real-time Smart Retail System For FPGA

“Deploy an object detection model on DPU to build a system which can show detected commodities in VCU decoded video or images from camera. Introduction : Checkout So Easy is a smart retail system on ZCU104 with VCU and DPU. As …

FPGA HW Acceleration Social Distancing Monitor

“Social distance monitor using yolov3 and DPU acceleration on Ultra96v2 The world is now under the cloud of Covid-19 and it has been a hard time when the virus is spreading across the world. Since keeping distance and wearing a …

Project  RapidROM

RapidROM

“This FPGA ROM emulator dramatically speeds software development time on computers with ROM-based storage. RapidROM This FPGA ROM emulator dramatically speeds software development time on computers with ROM-based storage. It will simulate any 28c256-compatible ROM chips. Typically, the …