Content for RISC-V

RISC-V

RISC-V (pronounced "risk-five") is an open-source hardware instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. Unlike other academic designs which are optimized only for simplicity of exposition, the designers state that the RISC-V instruction set is for practical computers. It is said to have features to increase computer speed, yet reduce cost and power use. These include a load–store architecture, bit patterns to simplify the multiplexers in a CPU, simplified standards-based floating-point, a design that is architecturally neutral, and placing most-significant bits at a fixed location to speed sign extension. Sign extension is said to often be on the critical timing path.

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Project  From Blinker to RISC-V

From Blinker to RISC-V

“This tutorial is a progressive journey from a simple blinky design to a RISC-V core. It works with the following boards: - IceStick - IceBreaker - ULX3S - ARTY If you do not have a board, you can run everything in simulation (but …

Project  egos-2000

egos-2000

“This project’s vision is to help every college student read all the code of an operating system. With only 2000 lines of code, egos-2000 implements every component of an operating system for education. It can run on a RISC …

News  Microchip Showcases RISC-V-Based FPGA and Space-Compute Solutions at RISC-V Summit

Microchip Showcases RISC-V-Based FPGA and Space-Compute Solutions at RISC-V Summit

“PolarFire® devices lead in delivering 2X power efficiency, military grade security and highest reliability, which will be extended by the PolarFire 2 FPGA roadmap Mid-range FPGAs and System-on-Chip (SoC) FPGAs have played a major role in moving computer workloads to …

News  Open Source RISC-V Is Rolling Towards the Mainstream

Open Source RISC-V Is Rolling Towards the Mainstream

“The last year or so was already a wild ride for the open source instruction set architecture RISC-V, then Intel stepped in, took a top tier membership, a seat on the board, pledged to spend a billion dollars on …

News  Microchip Adds Second Development Tool Offering for Designers Using Its Low-Power PolarFire RISC-V SoC FPGA for Embedded Vision Applications at the Edge

Microchip Adds Second Development Tool Offering for Designers Using Its Low-Power PolarFire RISC-V SoC FPGA for Embedded Vision Applications at the Edge

“Platform extends customer options for designing secure and reliable systems in applications ranging from neural network inferencing to Industrial Internet of Things (IIoT) and factory automation. Microchip Technology (Nasdaq: MCHP) today announced the second development tool offering in its Smart …

News  Alibaba Cloud Unveils New Server Chips to Optimize Cloud Computing Services

Alibaba Cloud Unveils New Server Chips to Optimize Cloud Computing Services

“Alibaba Cloud, the digital technology and intelligence backbone of Alibaba Group, today unveiled a new in-house processor design for use in its data centers. The server chips, named Yitian 710, are custom-built by Alibaba Group’s chip development business, T-Head …

News  First RISC-V computer chip lands at the European Processor Initiative

First RISC-V computer chip lands at the European Processor Initiative

“The European Processor Initiative (EPI) has run the successful first test of its RISC-V-based European Processor Accelerator (EPAC), touting it as the initial step towards homegrown supercomputing hardware. EPI, launched back in 2018, aims to increase the independence of …

Project  Creating a RISC-V system with an FPGA

Creating a RISC-V system with an FPGA

“In this project you will learn how to implement a RISC-V processor in a SmartFusion2 SoC. Everybody knows that the processor of the moment is the RISC-V, even it is not a processor itself, the amount of the …

News  RISC-V Launches the Open Hardware Diversity Alliance

RISC-V Launches the Open Hardware Diversity Alliance

” RISC-V International, a global open hardware standards organization, today announced the launch of the Open Hardware Diversity Alliance. The global Alliance, created by CHIPS Alliance, OpenPOWER Foundation, RISC-V, and Western Digital, will develop and provide learning and networking …

Project  The NEORV32 RISC-V Processor

The NEORV32 RISC-V Processor

“The NEORV32 Processor is a customizable microcontroller-like system on chip (SoC) that is based on the RISC-V NEORV32 CPU. The project is intended as auxiliary processor in larger SoC designs or as ready-to-go stand-alone custom / customizable microcontroller.”