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“We have looked at thermal imaging before however, we did that from scratch using Vivado and Software. In this project we are going to combine the FLIR Lepton with PYNQ, doing so allows me to create a PYNQ overlay that …
News Intel Announces Unmatched AI and Analytics Platform with New Processor, Memory, Storage and FPGA Solutions
“Intel today introduced its 3rd Gen Intel® Xeon® Scalable processors and additions to its hardware and software AI portfolio, enabling customers to accelerate the development and use of artificial intelligence (AI) and analytics workloads running in data center, network and …
“SystemVerilog code for HDMI 1.4b video/audio output on an FPGA. Why? Most free and open source HDMI source (computer/gaming console) implementations actually output a DVI signal, which HDMI sinks (TVs/monitors) are backwards compatible with. To support …
“Component video (YPbPr) output for the ZX Spectrum computer General The ZX Spectrum in its original form produces a radio frequency signal that can be fed into an analog TV. The quality of this signal is very poor, but this …
“A tiny (really tiny!) msp430-native microcontroller-like processor system written in platform independent VHDL There is a pretty gap in the landscape of open-source soft-core processors between the tiny 8-bit processors and the chunky 32-bit ones. So I decided to fill …
“What a Lattice iCE40 FPGA needs A clock input. Has to be provided by an oscillator, it doesn’t have a crystal driver. 1.2v core supply for the internal logic. 2.5v non volatile memory supply. Can be provided …
“Using a standard RC transmitter (HobbyKing HK-T6A) you will learn how to create and test Verilog to decode 6 channels of PWM. The transmitter outputs 6 PWM channels at 50Hz with each channel ranging from 1000us to 2000us. There …
“A re-creation of a Cosmic ELF computer, Coded in SpinalHDL This is a re-creation of a Cosmac ELF computer, Coded in SpinalHDL. The goal of this project is to end up with a cycle-accurate 1802 processor that can be used …
“FPGA-based real-time fractal generation. Fully pipelined, dynamic resource allocation, up to 18000 MMUL/s. Float matrix math on J1B CPU. Fractal generation is a popular FPGA design exercise. For example, Stanford university used it as lab assignment already in …
“By harnessing the power of an FPGA and a simple camera, you can create your very own digit recognition system from the comfort of your own desktop. In the world of artificial intelligence (AI), the recognition of handwritten digits proves …