The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
“The MK1 CPU is composed of several modules, all connected trough a common 8-bit BUS, the status of each module is shown by dedicated LEDs. The clock module is designed to allow step-by-step execution; in automatic mode the clock speed …
“You must be wondering why I’ve done this fancy and unusual project. The answer is pretty straightforward: I wanted to make “one of a kind” gift for my friend. Just something you can’t buy in a store , you …