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“The MK1 CPU is composed of several modules, all connected trough a common 8-bit BUS, the status of each module is shown by dedicated LEDs. The clock module is designed to allow step-by-step execution; in automatic mode the clock speed …
The 74HC/HCT283 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN). The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT) according to the equation: CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT Where (+) = plus. Due to the symmetry of the binary add function, the 74HC283 can be used with either all active HIGH operands (positive logic) or all active LOW operands (negative logic). In case of all active LOW operands the results S1 to S4 and COUT should be interpreted also as active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1, B1 can be assigned arbitrarily to pins 5, 6, 7, etc.
“The MK1 CPU is composed of several modules, all connected trough a common 8-bit BUS, the status of each module is shown by dedicated LEDs. The clock module is designed to allow step-by-step execution; in automatic mode the clock speed …