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The MK1 CPU is composed of several modules, all connected trough a common 8-bit BUS, the status of each module is shown by dedicated LEDs.

The clock module is designed to allow step-by-step execution; in automatic mode the clock speed can be adjusted from 1Hz up to 32KHz.
The computer programs are stored in RAM and the CPU can be programmed both manually, by inserting binary machine code through dip-switches, and automatically via a USB PC interface.
The Programming interface is designed to be used in conjunction with an Arduino Nano or the Start9 programming board.
The Start9 programming board allows the loading of multiple programs stored on an on-board flash memory without the aid of an external computer device.
The Addressable memory space is 1024 byte, data, stack and code spaces are separated, the code address space is not writable.
The instructions are variable-length (see instruction-set here) 1 or 2 bytes long (first byte for the opcode, the second one for the argument), there are 4 general purpose registers (A, B, C, D) and a stack pointer register for subroutine calls.
The Arithmetic Logic Unit has a dedicated register for the second operand and supports the following operations:
- Addition
- Subtraction
- OR
- AND
- NOT
- Left/Right Shift
- Left/Right Rotation
The Control Unit combinatory logic is implemented using EEPROMs (see microcode here) whilst each instruction is realized through a variable number of micro-instruction for a maximum of 6 micro-steps per instruction, including the fetch cycle. The instruction-set supports both direct and indirect memory access as well as absolute and conditional jumps on carry (CF) and zero (ZF) ALU flags.
The computation output can be visualized on a 4-digit display, with a dedicated register, able to represent positive and 2-complement negative numbers both in decimal and hexadecimal format.
The CPU can be extended thanks to the external BUS interface capable of handling up to 2 peripheral. The communication is bidirectional, the devices can send interrupts to the CPU to notify when new data is available. Interrupts are cleared once the data has been processed.
The only available peripheral at the moment is the Helix display interface, an ATmega328-driven 2x16 LCD output display.”

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