32K RAM for the OSI Bus

Now that I have a few OSI 495 prototype boards on-hand, I could finally build a combined static RAM board for the Challenger III using modern static RAM devices. Finally, no more reseating a ton of SEMI4200s every time the Challenger was moved onto or off of the workbench! I decided to start with a 32K design, but design in such a way that it could be expanded to 64K and beyond without too much trouble. This 32K RAM board design is suitable for anyone who needs to add to the base memory on a smaller Ohio Scientific system. It has been designed such that the board resides from 0 - 32K in address space (0x0000 to 0x7FFF). Each 4K segment in that range can be independently enabled or disabled this allows one to retain small chunks of original system memory without having to disable it or alter the RAM board to prevent address conflicts. For exmaple, if youre expanding a system based around the 500 CPU board, which has already been expanded to 4K RAM for BASIC, you can disable the bottom 4K on this design with a simple DIP switch setting.”

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