“TSMC has introduced its N4P process, a performance-focused enhancement of the foundry’s 5nm technology platform.
As the third major enhancement of TSMC’s 5nm family, N4P will deliver an 11% performance boost over the original N5 technology and a 6% boost over N4, the company indicated. Compared to N5, N4P will also deliver a 22% improvement in power efficiency as well as a 6% improvement in transistor density. In addition, N4P lowers process complexity and improves wafer cycle time by reducing the number of masks, TSMC disclosed.
TSMC’s N4P process was designed for an easy migration of 5nm platform-based products, which enables customers to not only better maximize their investment but will also deliver faster and more power efficient refreshes to their N5 products, the foundry noted.
N4P designs will be well-supported by TSMC’s comprehensive design ecosystem for silicon IP and EDA. With TSMC and its Open Innovation Platform partners helping to accelerate the product development cycle, the first products based on N4P technology are expected to tape out by the second half of 2022, according to the foundry.
“With N4P, TSMC strengthens our portfolio of advanced logic semiconductor technologies, each with its unique blend of performance, power efficiency and cost. N4P was optimized to provide a further enhanced advanced technology platform for both HPC and mobile applications,” said Kevin Zhang, senior VP of business development at TSMC. “Between all the variants of N5, N4 and N3 technologies, our customers will have the ultimate flexibility and unmatched choice of the best mix of attributes for their products.”“