“Andes Technology Corporation, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today announces the first commercial RISC-V vector processor IP, AndesCore™ NX27V, is upgraded to support the latest RISC-V Vector (RVV) extension spec (version 1.0), and several key features. RVV 1.0 includes new instructions such as vector floating-point reciprocal and reciprocal square-root estimate for math calculation. In addition to the existing register grouping, LMUL (vector length multiplier) adds fractional options to use less register bits to make it more flexible. The NX27V with powerful vector processing and parallel execution capability targets for the applications with large volumes of data such as AI, AR/VR, computer vision, cryptography, and multimedia.
The NX27V was designed from ground up to be a Cray-like full vector compute engine. Its Vector Registers are as wide as 512 bits each and can be extended to 4,096 bits through LMUL setting. It supports RVV standard data types such as integer, fixed point, and floating-point as well as Andes-enhanced data types optimized for AI representations. The NX27V contains a scalar unit and an Out-of-Order Vector Processing Unit (VPU). The latter has multiple functional units, operating simultaneously to generate up to 512-bit results every cycle to sustain the computation throughput needed in diversified applications. The NX27V comes with standard development tools and RVV compute libraries as well as AndesClarity™, a powerful visualization and analysis tool to help analyze and optimize the performance of critical computation kernels. Furthermore, OpenCL™ with integrated LLVM compiler is provided to enable parallel programming on heterogeneous computing architecture using multiple NX27V. With the configuration of 512-bit VLEN and SIMD width, the NX27V can achieve over 26x speedup in MobileNet v1, a popular convolution neural network (CNN).
Streaming Port is one of NX27V’s unique features based on ACE (Andes Custom Extension™) framework. It is a dedicated interface to efficiently exchange large amount of data between NX27V registers and an external module, which can range from a simple intelligent local memory to a full-featured DMA-capable hardware engine. The Streaming Port has decoupled command and data channels with an efficient handshaking protocol. As an example, ACE vector load/store instructions can be designed to send the control information to the command channel every cycle to enable a new vector data movement via the data channel while performing address increment and wraparound in parallel. Like RVV load/store instructions, they are aware of RVV controls such as LMUL. ACE vector load/store instructions respect data dependency because NX27V registers are scoreboarded. With the powerful Streaming Port, the NX27V can tightly interact with a hardware engine to fully exploit the efficiency of dedicated functions while leveraging the flexibility of comprehensive RVV extension to raise the overall performance.
“The NX27V has already been adopted by server-bound customers. In this release, it is upgraded to the latest RVV spec as well as the full ranges of data types up to 64 bits of FP64 and Int64. Its additional configurations of 256-bit VLEN and SIMD width extend NX27V’s coverage to a wider variety of requirements on performance and area,” said Andes CTO and EVP Dr. Charlie Su. “Together with the complete software development environment, the compute libraries and AI compiler support, NX27V is ready to take on high data rate applications from edge to cloud.”
“I am happy to announce that the NX27V was selected as a winner of 2020 ASPENCORE World Electronics Achievement Awards in the prestigious category of Outstanding Product Performance of the Year,” said Andes President Frankwell Lin. “I may be biased when I say the NX27V is the best vector processor IP, but winning the award evidently shows the international recognition of its excellent performance and rich features.””