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Xilinx DDS Compiler IP Tutorial on the Ultra96

An introduction to the Xilinx direct digital synthesis compiler with simple implementation on the Ultra96 V2.

Direct Digital Synthesizers (DDS) are a key tool in software defined radios and digital communication systems as they provide a way in the digital domain to generate a complex signal that is also variable. While the theory behind the DDS is fairly straightforward, implementing one for the first time in an FPGA can be a bit challenging, which is why I wanted to create this project as a very simple example of how to take the Xilinx DDS Compiler IP and get it running in the programmable logic of the Ultra96 board.

Also referred to as numerically controlled oscillators (NCO), a DDS contains a lookup table for the data values of a sinusoid which takes in a given phase value and outputs the appropriate data/magnitude value for the sinusoid. This input value determines the frequency of the output waveform in that the smaller the value is, the slower the DDS steps through the sinusoid lookup table and the output waveform is lower in frequency. In contrast, the higher the input value, the faster the DDS steps through the lookup table and the higher frequency the output waveform is. This input value is commonly referred to as the tuning word, but in the Xilinx DDS Compiler IP, it is referred to as the phase increment.”

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