Content for JTAG


JTAG (named after the Joint Test Action Group which codified it) is an industry standard for verifying designs and testing printed circuit boards after manufacture. JTAG implements standards for on-chip instrumentation in electronic design automation (EDA) as a complementary tool to digital simulation. It specifies the use of a dedicated debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address and data buses. The interface connects to an on-chip Test Access Port (TAP) that implements a stateful protocol to access a set of test registers that present chip logic levels and device capabilities of various parts.

Extracting firmware from devices using JTAG

“JTAG is a physical hardware interface that makes it possible, among other things, to extract the firmware image from electronic devices. The firmware, a program that executes in a dedicated way and with a specific purpose in a microcontroller or …



“On-chip debug (OCD) interfaces can provide chip-level control of a target device and are a primary vector used by engineers, researchers, and hackers to extract program code or data, modify memory contents, or affect device operation on-the-fly. Depending on the …

JTAG Debugging the ESP32 with FT2232 and OpenOCD

“In “Eclipse JTAG Debugging the ESP32 with a SEGGER J-Link” I used a SEGGER J-Link to debug an ESP32 device with JTAG. I looked at using one of the FTDI FT2232HL development boards which are supported by OpenOCD. The FT2232HL …