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“An accurate frequency counter using an FPGA, STM32 and a bluetooth android app. Here we have a good example of how a requirement for a simple tool spirals out of control and spawns a project that takes months to complete …
The AD9553 is a phase-locked loop (PLL) based clock translator designed to address the needs of passive optical networks (PON) and base stations. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. The user supplies up to two single-ended input reference signals or one differential input reference signal via the REFA and REFB inputs. The device supports holdover applications by allowing the user to connect a 25 MHz crystal resonator to the XTAL input. The AD9553 is pin programmable, providing a matrix of standard input/output frequency translations from a list of 15 possible input frequencies to a list of 52 possible output frequency pairs (OUT1 and OUT2). The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency translations.
“An accurate frequency counter using an FPGA, STM32 and a bluetooth android app. Here we have a good example of how a requirement for a simple tool spirals out of control and spawns a project that takes months to complete …