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“I came across this weird chip a few months ago. Designed by Motorola in the 70s, its purpose is to replace the “ladder logic” relays in industrial process control so all it needs to do is make simple decisions based …
Content for 74HC354
The 74HC/HCT354 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT354 data selectors/multiplexers contain full on-chip binary decoding, to select one-of-eight data sources. The data select address is stored in transparent latches that are enabled by a LOW on the latch enable input (LE). The transparent 8-bit data latches are enabled when the active LOW data enable input (E) is LOW. When the output enable input OE1 = HIGH, OE2 = HIGH or OE3 = LOW, the outputs go to the high impedance OFF-state. Operation of these output enable inputs does not affect the state of the latches.