“Customers can prototype with the same FPGA silicon and package that is now headed for space qualification
Microchip Technology (Nasdaq: MCHP) today announced it is shipping engineering silicon for its RT PolarFire® Field Programmable Gate Array (FPGA) while the device is being qualified to spaceflight component reliability standards. Designers can now create hardware prototypes with all the same electrical and mechanical performance that the space-qualified RT PolarFire FPGAs will provide for high-bandwidth on-orbit processing systems with industry-low power consumption and the ability to withstand radiation effects in space.
“This is a major milestone as we release RT PolarFire FPGA engineering silicon to our customers and begin the spaceflight qualification process through full QML Class V standards,” said Bruce Weyer, vice president of Microchip’s FPGA business unit. “Many of our customers have already jump-started satellite system payload development using our commercial PolarFire MPF500T FPGAs and now all prototyping can be done with silicon that will be identical in form, fit and function to our eventual flight-qualified RT PolarFire FPGAs.”
Microchip is qualifying its RT PolarFire RTPF500T FPGAs to Mil Std 883 Class B, QML Class Q and QML Class V — the highest qualification and screening standard for monolithic integrated circuits in space. Designed to survive a rocket launch and meet demanding performance needs in space, RT PolarFire FPGAs are ideal for applications including high-resolution passive and active imaging, precision remote scientific measurement, multi-spectral and hyper-spectral imaging, and object detection and recognition using neural networks. These applications require high levels of operating performance and density, low heat dissipation, low power consumption and low system-level costs.
About the RT PolarFire FPGA
Microchip’s RT PolarFire FPGAs increase computational performance so satellite payloads can transmit processed information rather than raw data and make optimal use of limited downlink bandwidth. The devices exceed the performance, logic density and serializer-deserializer (SERDES) bandwidth of any other currently available space-qualified FPGA. They also enable more system complexity than previous FPGAs and withstand Total Ionizing Dose (TID) exposure beyond the 100 kilorads (kRads) typical of most earth-orbiting satellites and many deep-space missions. Their power-efficient architecture reduces power consumption up to 50 percent compared to SRAM FPGAs, leveraging SONOS configuration switches that also eliminate the problem of configuration upsets due to radiation in space.”