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JEDEC DDR5 & NVDIMM-P Standards Under Development

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced that development of the widely-anticipated DDR5 (Double Data Rate 5) and NVDIMM-P Design standards is moving forward rapidly. Publication for both is forecasted for 2018. Industry users will have the opportunity to learn more about each standard at JEDEC’s Server Forum event in Santa Clara, CA on Monday, June 19, 2017. For more information and to register, visit the JEDEC website. JEDEC DDR5 memory will offer improved performance with greater power efficiency as compared to previous generation DRAM technologies. As planned, DDR5 will provide double the bandwidth and density over DDR4, along with delivering improved channel efficiency. These enhancements, combined with a more user-friendly interface for server and client platforms, will enable high performance and improved power management in a wide variety of applications. As demand for DRAM capacity and bandwidth continues to grow within systems, Hybrid DIMM technologies such as JEDEC NVDIMM-P will enable new memory solutions optimized for cost, power usage and performance. Adding to the existing NVDIMM-N JEDEC standards, NVDIMM-P will be a new high capacity persistent memory module for computing systems.”

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