“For once, there will be a ceasefire in the war between major chip architectures x86, ARM and Power9, which will all be used in a supercomputer being built in Barcelona. The MareNostrum 4 is being built by the Barcelona Supercomputing Center and will have three clusters, each of which will house Intel x86, ARM and Power9 chips. Those clusters will be linked to form a supercomputer that will deliver up to 13.7 petaflops of performance. All three architectures have never been implemented together in a supercomputer, let alone PCs or servers. It raises questions on how the architectures will work together. The three chip architectures are fundamentally different. An application written to take advantage of a specific architecture won’t work on another, but server architectures are changing so different types of systems can coexist. Linux supports x86, ARM and Power, so it’s possible to write applications to work across architectures.”
Related Content
Related Posts:
- Automotive DC motor pre-driver from STMicroelectronics simplifies EMI optimization and saves power
- Integrated Actuation Power Solution Aims to Simplify Aviation Industry’s Transition to More Electric Aircraft
- Microchip Brings Enhanced Code Protection and up to 15W of Power Delivery to its USB Microcontroller Portfolio
- Microchip Technology Expands Its Serial SRAM Portfolio to Larger Densities and Increased Speeds
- Micron First to Production of 200+ Layer QLC NAND in Client and Data Center
- New Renesas MCUs with High-Resolution Analog and Over-the-Air Update Support Help Customer Systems Conserve Energy
- NXP Breaks Through Integration Barriers for Software-Defined Vehicle Development with Open S32 CoreRide Platform
- onsemi Launches Next-Generation Electrochemical Sensor Solution for Industrial, Environmental and Healthcare Applications
- Renesas Introduces New Entry-Level RA0 MCU Series with Best-in-Class Power Consumption
- Renesas’ New FemtoClock™ 3 Timing Solution Delivers Industry’s Lowest Power and Leading Jitter Performance of 25fs-rms